4-Bit Ring Counter: Full Sequence Trace
A 4-bit ring counter circulates a single active HIGH bit through a shift register on every positive edge of the clock when enabled. Six signals are shown: CLK (clock, period 2), EN (active-high enable), and four outputs Q3, Q2, Q1, and Q0. The counter is pre-loaded with the state 1000 (where Q3 is 1 and all other bits are 0) prior to time step 0. Trace all four output signals across 10 time steps to demonstrate the N=4 period and the sequence rollover.
Constraints
- The period of an N-bit ring counter is exactly N clock cycles.
- Only one flip-flop holds a 1 at any given time during standard operation.
Topics
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Place the gates, wire them up and watch the signals settle. Every submission runs on the same simulation engine that grades it.
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