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Codiode/Problems/Sequential Logic

Adjustable PWM Generator

MediumLogic CircuitBuild

Motor controllers and LED drivers rely on pulse-width modulation to translate digital values into proportional analog power. The PWM generator produces a continuous periodic square wave where the high time is strictly determined by an input control word.

The circuit operates on a continuous 256-cycle base period. An 8-bit input duty specifies the exact number of clock cycles the output pwm_out remains high during this period. The output must be 1 when the internal cycle count is less than the active duty value, and 0 otherwise. To prevent output glitches and erratic power delivery, changes to the live duty input must only take effect at the exact beginning of a new 256-cycle period.

| rst | Active duty | Internal Count | pwm_out | |-------|---------------|----------------|-----------| | 1 | X | X | 0 | | 0 | 0 | Any | 0 | | 0 | > Count | Count | 1 | | 0 | <= Count | Count | 0 |

Constraints

  • Implement an 8-bit internal counter that increments continuously and wraps automatically.
  • Update the active duty cycle internally only when the internal period counter equals 0.
  • Use a synchronous active-high reset rst to clear the counter, the active duty cycle register, and the output.

Topics

counterpwminterfaceglitch-free

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