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Codiode/Problems/Sequential Logic

Bidirectional Ring Counter

HardLogic CircuitBuild

Stepper motors, scanning displays, and token-ring arbiters require a single active bit to circulate continuously in either direction. The bidirectional ring counter achieves this by actively switching the input source of each register stage based on a direction control signal, rewiring the feedback path dynamically.

Implement a 4-bit bidirectional ring counter. A synchronous active-high RST signal initializes the circuit to a one-hot state where Q0 is 1 and all other outputs are 0. When RST is 0, the active bit shifts each clock cycle based on the DIR signal. Multiplexers at the D input of each flip-flop must route the correct neighbor's output to achieve the shift.

| DIR | D3 (Input to Q3) | D2 (Input to Q2) | D1 (Input to Q1) | D0 (Input to Q0) | |-------|--------------------|--------------------|--------------------|--------------------| | 0 | Q0 | Q3 | Q2 | Q1 | | 1 | Q2 | Q1 | Q0 | Q3 |

Constraints

  • Use exactly four D flip-flops for state retention.
  • Use 2:1 multiplexers (or equivalent combinational logic) to route the feedback signals into the D inputs.
  • Implement a synchronous active-high RST that forces the output state to Q3=0, Q2=0, Q1=0, Q0=1.
  • Boundary wrapping must correctly connect the ends of the 4-bit chain.

Topics

MultiplexersCountersState MachinesShift Registers

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