Circular Buffer Write Pointer Logic
Network routers, audio processing pipelines, and UART FIFOs rely on circular buffers to manage streaming data in bounded memory. The write pointer must wrap around seamlessly to continuously overwrite the oldest data.
The circuit maintains a 3-bit write pointer ptr for a modulo-6 circular buffer. The pointer increments on write and resets to zero immediately after reaching address 5.
| rst | wr_en | Current ptr | Next ptr | |-------|---------|---------------|------------| | 1 | X | X | 0 | | 0 | 0 | X | Current | | 0 | 1 | 0 to 4 | ptr + 1 | | 0 | 1 | 5 | 0 |
Constraints
- Implement synchronous logic using standard D flip-flops.
- Treat
rstas a synchronous, active-high reset. - Restrict the maximum pointer value to exactly 5.
Topics
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