Cross Domain Reconvergence Functional Failure
Cross-domain signals must not reconverge in logic if synchronized independently due to variable arrival times. A control path transfers valid_in and cmd_in from a source clock domain clk_a to a destination clock domain clk_b to trigger an execute signal.
Expected behavior:
The execute output must assert high in the destination domain for one clock cycle when a valid command is issued from the source domain. The circuit must safely transfer these signals without risking timing misalignment between the valid strobe and the command data.
Simulation shows execute = 0 during destination clock cycle 4 when both inputs were asserted simultaneously in source clock cycle 1. The execution pulse is missing or misaligned in the destination domain, causing the command to be dropped.
Inspect the circuit and correct the fault.
Constraints
- The circuit must use exactly one 2-flop synchronizer for the control path.
- The command signal must be captured in a holding register and sampled using the synchronized control signal.
- Do not route multiple independently synchronized signals into combinational logic.
Topics
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