D Latch: Transparency Hazard with Combinational Glitches
A D latch is transparent when GATE is HIGH, immediately passing all input changes to the output, while a positive-edge-triggered D flip-flop captures D only exactly on the LOW-to-HIGH transition of GATE.
Four signals are shown: GATE (control input), D (data input driven by an upstream combinational block), Q_LATCH (latch output, initially 0), and Q_DFF (flip-flop output, initially 0).
Trace Q_LATCH and Q_DFF across all 14 time steps to observe how the flip-flop filters out the combinational glitches that the latch allows to pass through.
Constraints
Q_LATCHmust followDcontinuously wheneverGATEis 1 and hold its value whenGATEis 0.Q_DFFmust only update its value whenGATEtransitions from 0 to 1 and hold its value at all other times.
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