Dual Edge Detector
Interrupt controllers and DDR data samplers often require triggering an action whenever a signal toggles, regardless of the transition direction. A dual edge detector identifies any state change on an input line and asserts a single-cycle pulse.
The circuit receives an input din and must generate an output pulse that goes high for exactly one clock cycle immediately following any rising or falling edge on din. This is achieved by comparing the current input state against its state from the previous clock cycle, din_prev.
| din | din_prev | pulse | |-------|------------|---------| | 0 | 0 | 0 | | 0 | 1 | 1 | | 1 | 0 | 1 | | 1 | 1 | 0 |
Constraints
- Use exactly one D flip-flop to store the previous state of the input.
- Use an XOR gate to evaluate the transition condition.
- Do not use any other sequential elements.
Topics
Solve this problem
Place the gates, wire them up and watch the signals settle. Every submission runs on the same simulation engine that grades it.
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