Johnson Counter: Q Feedback Instead of Q_bar Debug
A 4-bit Johnson counter produces an 8-state fill-drain sequence and is commonly used in digital design for glitch-free state machines and clock dividers. The sequence is generated by feeding the inverted output of the last flip-flop back to the input of the first flip-flop.
Expected behavior:
| Cycle | Q3 | Q2 | Q1 | Q0 | |-------|------|------|------|------| | Reset | 0 | 0 | 0 | 0 | | 1 | 0 | 0 | 0 | 1 | | 2 | 0 | 0 | 1 | 1 | | 3 | 0 | 1 | 1 | 1 | | 4 | 1 | 1 | 1 | 1 | | 5 | 1 | 1 | 1 | 0 | | 6 | 1 | 1 | 0 | 0 | | 7 | 1 | 0 | 0 | 0 | | 8 | 0 | 0 | 0 | 0 |
Simulation shows that when initialized to 0000, the counter remains at 0000 indefinitely instead of filling with 1s. When forced into a state like 1000, the waveform shows a period of 4 with a one-hot sequence, exhibiting ring counter behavior rather than the expected 8-state fill-drain sequence.
Inspect the circuit and correct the fault.
Constraints
- Do not alter the clock or reset distribution networks.
- Keep the shift register structure intact:
Q0shifts toQ1,Q1toQ2, andQ2toQ3.
Topics
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