LFSR: Self-Correction for All-Zeros Lockup
Linear Feedback Shift Registers (LFSRs) generate pseudo-random sequences for cryptography, bit-error-rate testing, and memory built-in self-test (BIST). A standard XOR-based LFSR contains a critical flaw: if the state ever becomes all zeros, the feedback remains zero and the circuit locks up permanently.
Construct a 4-bit LFSR with active lockup correction. The circuit evaluates the current state of Q3, Q2, Q1, and Q0 and shifts right on each rising edge of clk.
Q2receivesQ3Q1receivesQ2Q0receivesQ1Q3receives the feedback:Q1 XOR Q0
To prevent lockup, monitor the current state. If all four bits are 0, override the normal feedback to force Q3 to 1 on the next clock edge. The circuit will initialize to 0000 and must immediately escape to 1000 on the first rising clock edge, continuing through the standard 15-state pseudo-random sequence.
Constraints
- Use D-type flip-flops for the state register.
- Use exactly one 4-input NOR gate to detect the all-zeros state.
- Combine the NOR gate output with the XOR feedback to drive the input of the
Q3flip-flop. - Do not use asynchronous preset or clear pins to escape the zero state.
Topics
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