Mod-12 Counter: Cascade Timing Waveform
A synchronous Mod-12 counter cascades a Mod-4 counter and a Mod-3 counter, both positive-edge-triggered by CLK.
Three signals are shown: CLK (clock, period 2), Q4_1 (output, initially 0), and Q3_1 (output, initially 0). The Mod-4 counter counts 0, 1, 2, 3 and increments on every rising edge of CLK. The Mod-3 counter counts 0, 1, 2 and increments on the rising edge of CLK only when the Mod-4 counter is at its maximum value of 3. Signals Q4_1 and Q3_1 represent the most significant bits of the Mod-4 and Mod-3 counters, respectively.
Trace Q4_1 and Q3_1 across 26 time steps to capture the full 12-cycle rollover.
Constraints
- Both counters update only on the LOW-to-HIGH transition of
CLK. - The Mod-12 rollover occurs when the Mod-4 counter transitions from 3 to 0 and the Mod-3 counter transitions from 2 to 0 simultaneously.
Topics
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