Mod-6 Counter: Self-Correcting (No Don't-Cares)
State machines in mission-critical applications cannot risk locking up in invalid states due to radiation or power-on glitches. A self-correcting counter explicitly routes unused states back to a known safe condition, trading a slightly larger logic footprint for guaranteed recovery.
Design the next-state combinational logic for a 3-bit self-correcting mod-6 counter. Inputs Q2, Q1, and Q0 represent the current state. Outputs D2, D1, and D0 represent the next state. The counter increments normally from 0 to 5 and wraps to 0. If the system enters state 6 or 7, it must immediately transition to 0 on the next clock cycle.
| Q2 | Q1 | Q0 | D2 | D1 | D0 | |------|------|------|------|------|------| | 0 | 0 | 0 | 0 | 0 | 1 | | 0 | 0 | 1 | 0 | 1 | 0 | | 0 | 1 | 0 | 0 | 1 | 1 | | 0 | 1 | 1 | 1 | 0 | 0 | | 1 | 0 | 0 | 1 | 0 | 1 | | 1 | 0 | 1 | 0 | 0 | 0 | | 1 | 1 | 0 | 0 | 0 | 0 | | 1 | 1 | 1 | 0 | 0 | 0 |
Constraints
- Implement strictly combinational logic for the next-state calculations.
- Assign explicit zero values for the next state of invalid states 6 and 7.
- Do not use don't-care conditions (X) during logic minimization.
Topics
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