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Codiode/Problems/Sequential Logic

Ring Counter: Feedback via Q_bar Produces Johnson Behavior Debug

HardLogic CircuitDebug

A 4-bit ring counter shifts a single active-high bit through four flip-flops in a circular pattern. The circuit must maintain a strict one-hot state encoding at all times.

Expected behavior:

| Clock | Q3 | Q2 | Q1 | Q0 | |---------|------|------|------|------| | 0 | 0 | 0 | 0 | 1 | | 1 | 0 | 0 | 1 | 0 | | 2 | 0 | 1 | 0 | 0 | | 3 | 1 | 0 | 0 | 0 | | 4 | 0 | 0 | 0 | 1 |

Simulation shows an 8-state sequence before repeating. After initialization to Q3=0, Q2=0, Q1=0, Q0=1, the sequence proceeds correctly for the first three clock cycles. On the fourth clock cycle, the output transitions to Q3=0, Q2=0, Q1=0, Q0=0 instead of the expected Q3=0, Q2=0, Q1=0, Q0=1. The one-hot property is lost.

Inspect the circuit and correct the fault.

Constraints

  • Do not add any new flip-flops or logic gates to the circuit.
  • Do not modify the clock or reset signal routing.
  • The circuit must use exactly four flip-flops.

Topics

counterdebugsequential-logicshift-registers

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Place the gates, wire them up and watch the signals settle. Every submission runs on the same simulation engine that grades it.

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