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Codiode/Problems/Sequential Logic

SISO Recirculating Memory

HardLogic CircuitBuild

Circular buffers and ring counters rely on data looping continuously without software intervention. A recirculating memory feeds its final stage output back to its first stage input to preserve a data pattern indefinitely.

Construct a 4-bit recirculating shift register. The circuit routes signals into the first flip-flop based on the load control pin. When load is 1, new serial data from S_in enters the register. When load is 0, the output of the final stage Q_out routes back to the beginning. The register shifts right on every clock cycle.

| load | D0 (Stage 0) | D1 (Stage 1) | D2 (Stage 2) | D3 (Stage 3) | |--------|----------------|----------------|----------------|----------------| | 1 | S_in | Q0 | Q1 | Q2 | | 0 | Q_out | Q0 | Q1 | Q2 |

Constraints

  • Use exactly four D flip-flops.
  • Use a multiplexer to control the input to the first flip-flop.
  • Feedback must originate from the non-inverted output of the final stage.
  • Do not use sequential components other than basic D flip-flops.

Topics

Sequential LogicShift RegistersRecirculating

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