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Codiode/Problems/Sequential Logic

SR NAND Latch Active-Low Operation

EasyLogic CircuitTiming Diagram

An SR NAND latch uses active-low inputs to update its state, where a LOW on S_bar sets Q to 1 and a LOW on R_bar resets Q to 0. Three signals are shown: S_bar (active-low set input), R_bar (active-low reset input), and Q (output, initially 0). Trace Q across all 8 time steps.

Constraints

  • S_bar = 0 and R_bar = 0 occurring simultaneously is an invalid state and does not appear in this waveform.
  • When both inputs are HIGH (S_bar = 1, R_bar = 1), the latch holds its previous value.

Topics

nand-latchsr-latchsequential-logicactive-low

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