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Codiode/Problems/Sequential Logic

Bidirectional SR: Barrel-Shift Emulation

HardLogic CircuitBuild

Processor datapaths rely on barrel shifters to execute single-cycle, multi-position bit shifts for fast arithmetic and alignment operations. This circuit implements an O(1) circular right shift, selecting the correct source bit for each flip-flop via a multiplexer network rather than chaining shift cycles.

When LOAD is 1, the 4-bit register captures D_IN. When LOAD is 0, the register circularly shifts its current state right by the number of positions specified by SHIFT_AMOUNT. The shift occurs in a single clock cycle.

| LOAD | SHIFT_AMOUNT | Q_next[3] | Q_next[2] | Q_next[1] | Q_next[0] | |--------|----------------|-------------|-------------|-------------|-------------| | 1 | XX | D_IN[3] | D_IN[2] | D_IN[1] | D_IN[0] | | 0 | 00 | Q[3] | Q[2] | Q[1] | Q[0] | | 0 | 01 | Q[0] | Q[3] | Q[2] | Q[1] | | 0 | 10 | Q[1] | Q[0] | Q[3] | Q[2] | | 0 | 11 | Q[2] | Q[1] | Q[0] | Q[3] |

Constraints

  • Use exactly four D flip-flops to maintain the 4-bit state.
  • Implement the shift routing using only combinational multiplexers.
  • Do not chain multiple 1-bit shift registers sequentially.

Topics

MultiplexersShift RegistersBarrel Shifter

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