I2C ACK NACK Detector
I2C masters must verify successful byte transfer to a slave device to determine if communication should continue or abort. The acknowledge phase is the critical handshake at the end of every 8-bit payload.
Design a circuit that tracks the transmission of an I2C byte and detects a Not Acknowledge (NACK) condition. The byte_start signal pulses high for one scl cycle to indicate the first bit of a new byte transmission. On the 9th rising edge of scl after byte_start (counting the byte_start cycle as cycle 1), the circuit must sample sda. If sda is 1 during this 9th cycle, the receiver has not acknowledged the byte. The nack_err output must assert high for exactly one scl cycle immediately following the 9th edge.
Constraints
- Implement sequential logic triggered by the rising edge of
scl. - The
nack_erroutput must be a registered signal. - The internal bit counter must reset asynchronously via
rst_nand synchronously viabyte_start.
Topics
Solve this problem
Place the gates, wire them up and watch the signals settle. Every submission runs on the same simulation engine that grades it.
This problem is part of Codiode Pro. The statement above is free to read.
The circuit builder and code editor need a desktop screen. On a phone, read the problem here and open it on a laptop to solve.