Memory Depth Expansion with Chip Select
Microprocessors expand addressable memory by combining multiple smaller RAM chips into a single continuous address space. The high-order address bits must route the global chip select signal to exactly one target bank to prevent bus collisions.
Route the global cs signal to either cs_0 or cs_1 based on the value of addr_msb. When cs is low, all memory banks must remain unselected.
| cs | addr_msb | cs_0 | cs_1 | |------|------------|--------|--------| | 0 | 0 | 0 | 0 | | 0 | 1 | 0 | 0 | | 1 | 0 | 1 | 0 | | 1 | 1 | 0 | 1 |
Constraints
- Implement using only basic logic gates.
- Do not use multiplexer components.
- Use strictly combinational logic.
Topics
Solve this problem
Place the gates, wire them up and watch the signals settle. Every submission runs on the same simulation engine that grades it.
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