Safe External Button Sampler
Mechanical switches bounce and create dozens of false transitions before settling. A robust input sampler must pull the asynchronous signal into the clock domain, filter out high-frequency noise, and extract a single clean pulse per button press.
Construct a complete button sampling subsystem for the asynchronous input btn_in. The circuit must perform three operations in sequence: 1. Synchronize btn_in to the clock domain using a standard 2-flip-flop synchronizer. 2. Pass the synchronized signal through a 3-bit shift register. The internal debounced state is evaluated as high only when all 3 bits of this shift register are 1. 3. Generate a single-cycle high pulse on pulse_out exactly when the debounced state transitions from 0 to 1.
Constraints
- Use D flip-flops for all state elements.
- Build the synchronizer using exactly two D flip-flops in series.
- Build the debounce filter using exactly three D flip-flops in series.
- Extract the edge transition using combinational logic and one final state element to store the previous debounced state.
Topics
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Place the gates, wire them up and watch the signals settle. Every submission runs on the same simulation engine that grades it.
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