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Codiode/Problems/Sequential Logic

Simple Pulse Width Counter

EasyLogic CircuitBuild

Measuring the duration of physical events requires converting continuous signals into discrete clock intervals. A pulse width counter measures the active duration of an incoming signal and provides a digital value representing the time the signal remained asserted.

Implement a synchronous pulse width counter. The system operates on the rising edge of clk. The output count is an 8-bit unsigned integer.

  • When the synchronous rst is 1, count becomes 0.
  • When pulse transitions from 0 to 1, count clears to 0 on that clock edge.
  • When pulse is 1 and was 1 on the previous clock edge, count increments by 1.
  • When pulse is 0, count holds its previous value.

Constraints

  • Use only synchronous logic triggered on the rising edge of clk.
  • Do not use asynchronous resets.
  • Implement the edge detection for pulse internally using a register.

Topics

Sequential LogicCountersEdge Detection

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