Up/Down Counter: Overflow and Underflow Detection
Multi-stage bidirectional systems like CNC position trackers and digital volume controls rely on cascaded counters to track large values. Overflow and underflow detection enables this cascade: the carry-out of one stage directly drives the count-enable of the next stage.
Design a 4-bit synchronous up/down counter that accurately signals when it reaches its terminal bounds. The counter maintains a 4-bit state Q and updates on the rising clock edge based on the active-high enable EN and direction control DIR.
| EN | DIR | RST | Action | |------|-------|-------|--------| | X | X | 1 | Q becomes 0 | | 0 | X | 0 | Q holds state | | 1 | 1 | 0 | Q increments | | 1 | 0 | 0 | Q decrements |
The circuit must provide two strictly combinational status flags: COUT asserts HIGH when the counter is at its maximum value (15) AND the direction is set to UP (DIR = 1). BOUT asserts HIGH when the counter is at its minimum value (0) AND the direction is set to DOWN (DIR = 0).
Constraints
- Implement a 4-bit synchronous counter with an active-high synchronous reset.
COUTandBOUTmust be completely combinational and gate their respective terminal counts with theDIRsignal.- Do not assert
COUTwhen counting down from 15, and do not assertBOUTwhen counting up from 0.
Topics
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